Analog/RF Layout Design Engineer
Positions: Junior, Senior
Salary: Competitive salary with generous stock options
Commensurate with experience/skill
- You will optimize the layout and high-frequency (multi-gigahertz) routing of high-precision analog circuits, such as:
high-speed amplifiers, wireline SERDES, PLL, or other baseband circuits like LDO, temp sensor, ADC, Filters, etc.
- Use EDA tools (Cadence, Mentor, Allegro) to layout, extract, and verify the high-performance layout.
- Work and iterate with analog/RF engineers to optimize the layout performance.
- BSEE in analog IC design with 2 years’ experience.
- Experience in Cadence EDA tools.
- Team player with good communication skills.
- Desired: Experience with the layout of SERDES transmitter/receiver, PLL, TIA, CDR, LNA etc.
- Desired: Experience in RF circuit layout, including high-frequency effects, crosstalk, and bandwidth optimization.